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IBM Journal of Research and Development
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Proceedings of the 36th annual international symposium on Computer architecture
Scalable high performance main memory system using phase-change memory technology
Proceedings of the 36th annual international symposium on Computer architecture
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MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
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Proceedings of the sixteenth international conference on Architectural support for programming languages and operating systems
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Proceedings of the sixteenth international conference on Architectural support for programming languages and operating systems
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FAST'11 Proceedings of the 9th USENIX conference on File and stroage technologies
Communications of the ACM
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ICDE '11 Proceedings of the 2011 IEEE 27th International Conference on Data Engineering
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ACM SIGMOD Record
ASPLOS XVII Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating Systems
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Advances in memory technology are promising the availability of byte-addressable persistent memory as an integral component of future computing platforms. This change has significant implications for software that has traditionally made a sharp distinction between durable and volatile storage. In this paper we describe a software-hardware architecture, WrAP, for persistent memory that provides atomicity and durability while simultaneously ensuring that fast paths through the cache, DRAM, and persistent memory layers are not slowed down by burdensome buffering or double-copying requirements. Trace-driven simulation of transactional data structures indicate the potential for significant performance gains using the WrAP approach.