LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
Multiprocessor resource allocation for throughput-constrained synchronous dataflow graphs
Proceedings of the 44th annual Design Automation Conference
Efficient mode enumeration of compositional hybrid systems
HSCC'03 Proceedings of the 6th international conference on Hybrid systems: computation and control
Hybrid modelling and control of power electronics
HSCC'03 Proceedings of the 6th international conference on Hybrid systems: computation and control
Heracles: Fully Synthesizable Parameterized MIPS-Based Multicore System
FPL '11 Proceedings of the 2011 21st International Conference on Field Programmable Logic and Applications
Multiprocessor System-on-Chip (MPSoC) Technology
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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This paper presents a novel Multicore Architecture for Real-Time Hybrid Applications (MARTHA) with time-predictable execution, low computational latency, and high performance that meets the requirements for control, emulation and estimation of next-generation power electronics and smart grid systems. Generic general-purpose architectures running real-time operating systems (RTOS) or quality of service (QoS) schedulers have not been able to meet the hard real-time constraints required by these applications. We present a framework based on switched hybrid automata for modeling power electronics applications. Our approach allows a large class of power electronics circuits to be expressed as switched hybrid models which can be executed on a single hardware platform.