Proposing a new task model towards many-core architecture

Authors:
Akio Shimada;Balazs Gerofi;Atsushi Hori;Yutaka Ishikawa
Affiliations:
RIKEN Advanced Institute for Computational Science;The University of Tokyo;RIKEN Advanced Institute for Computational Science;RIKEN Advanced Institute for Computational Science and The University of Tokyo
Venue:
Proceedings of the First International Workshop on Many-core Embedded Systems
Year:
2013

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Abstract

Many-core processors are gathering attention in the areas of embedded systems due to their power-performance ratios. To utilize cores of a many-core processor in parallel, programmers build multi-task applications that use the task models provided by operating systems. However, the conventional task models cause some scalability problems when multi-task applications are executed on many-core processors. In this paper, a new task model named Partitioned Virtual Address Space (PVAS), which solves the problems, is proposed. PVAS enhances inter-task communications of multi-task applications and averts serialization of concurrent virtual memory operations. Preliminary evaluations by using micro benchmarks showed that PVAS has the potential to promote the performance of multi-task applications that run on many-core processors.