Low-power and high-accurate synchronization for IEEE 802.16d systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ML estimation of time and frequency offset in OFDM systems
IEEE Transactions on Signal Processing
A robust timing and frequency synchronization for OFDM systems
IEEE Transactions on Wireless Communications
IEEE Transactions on Wireless Communications
IEEE Transactions on Wireless Communications
IEEE Transactions on Wireless Communications
UWB Mixed-Signal Transform-Domain Direct-Sequence Receiver
IEEE Transactions on Wireless Communications
Maximum likelihood synchronization for OFDM using a pilot symbol: algorithms
IEEE Journal on Selected Areas in Communications
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Based on the frequency-domain analog-to-digital conversion (FD ADC), this work builds a low-complexity sequential searcher for robust symbol synchronization in a 4×4 FD multiple-input multiple-output orthogonal frequency-division multiplexing (MIMO-OFDM) modem. The proposed scheme adopts a symbol-rate sequential search with simple cross-correlation metric to recover symbol timing over the frequency domain. Simulation results show that the detection error is less than 2% at signal-to-noise ratio (SNR) ≤ 5 dB. Performance loss is not significant when carrier frequency offset (CFO) ≤ 100 ppm. Using an in-house 65-nm CMOS technology, the proposed solution occupies 84.881 k gates and consumes 5.2 mW at 1.0 V supply voltage. This work makes the FD ADC more attractive to be adopted in high throughput OFDM systems.