Exploiting Precedence Relations in the Schedulability Analysis of Distributed Real-Time Systems
RTSS '99 Proceedings of the 20th IEEE Real-Time Systems Symposium
A General Framework for Analysing System Properties in Platform-Based Embedded System Designs
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Design Space Exploration and System Optimization with SymTA/S " Symbolic Timing Analysis for Systems
RTSS '04 Proceedings of the 25th IEEE International Real-Time Systems Symposium
An Interface Algebra for Real-Time Components
RTAS '06 Proceedings of the 12th IEEE Real-Time and Embedded Technology and Applications Symposium
Proceedings of the Conference on Design, Automation and Test in Europe
Compositional analysis of switched ethernet topologies
Proceedings of the Conference on Design, Automation and Test in Europe
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In this paper, we focus on modeling and analyzing multi-cast and broadcast traffic latencies on switch-level within an Ethernet- based communication network for automotive applications. The analysis is performed adapting existing worst/best case schedulability analysis concepts, techniques, and methods. Under our modeling assumptions, we obtain safe bounds for both the minimum (lower bound) and maximum (upper bound) latencies. The formal analysis results are validated via simulation to determine the probability distribution of the latencies (including the worst/best case ones). We also show that the bounds can be tightened under some assumptions and we sketch opportunities for future work in this area. Finally, we show how formal analysis can be used to quickly explore tradeoffs in the system configuration which delivers the required performance. All results in this work are obtained on a moderately complex yet meaningful automotive example.