Worst-case delay analysis of variable bit-rate flows in network-on-chip with aggregate scheduling

Authors:
Fahimeh Jafari;Axel Jantsch;Zhonghai Lu
Affiliations:
KTH Royal Institute of Technology, Sweden;KTH Royal Institute of Technology, Sweden;KTH Royal Institute of Technology, Sweden
Venue:
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Year:
2012

Citing 5
Cited 0

Performance Guarantees in Communication Networks

Performance Guarantees in Communication Networks
Delay bounds for a network of guaranteed rate servers with FIFO aggregation

Computer Networks: The International Journal of Computer and Telecommunications Networking
Tight end-to-end per-flow delay bounds in FIFO multiplexing sink-tree networks

Performance Evaluation
Network calculus: a theory of deterministic queuing systems for the internet

Network calculus: a theory of deterministic queuing systems for the internet
Output process of variable bit-rate flows in on-chip networks based on aggregate scheduling

ICCD '11 Proceedings of the 2011 IEEE 29th International Conference on Computer Design

Quantified Score

Hi-index	0.00

Visualization

Abstract

Aggregate scheduling in routers merges several flows into one aggregate flow. We propose an approach for computing the end-to-end delay bound of individual flows in a FIFO multiplexer under aggregate scheduling. A synthetic case study exhibits that the end-to-end delay bound is up to 33.6% tighter than the case without considering the traffic peak behavior.