A study on micro level traffic prediction for energy-aware routers
ACM SIGOPS Operating Systems Review
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For green networking, Sliced Router Architecture was proposed, which controls the power consumption of routers by adjusting the routers' performance on the basis of the volume of traffic. In this architecture, any packet losses can be eliminated, but this leads to a significant increase in processing latency in some cases, which also seriously degrades the performance of routers. In this paper, we propose two extensions to Sliced Router Architecture to achieve both zero packet loss and low latency, which satisfies the requirement in current common routers. We first propose parallelized prediction counters for improving accuracy in prediction. Moreover, we extend the prediction circuit to support multiple prediction functions that derive the number of active slices continuously or flexibly to reduce traffic latency without any packet losses. We then perform a simulation to evaluate improvements in prediction accuracy and the trade-off between power saving and worst traffic latency. Our results show that the power efficiency increased up to 3.4% by introducing parallelized counters and achieved 156 microseconds of the processing latency by accepting a 21.1% increase in power consumption.