Term rewriting and all that
Architecting Solvers for SAT Modulo Theories: Nelson-Oppen with DPLL
FroCoS '07 Proceedings of the 6th international symposium on Frontiers of Combining Systems
Complete Instantiation for Quantified Formulas in Satisfiabiliby Modulo Theories
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
SEM: a system for enumerating models
IJCAI'95 Proceedings of the 14th international joint conference on Artificial intelligence - Volume 1
Annals of Mathematics and Artificial Intelligence
Solving quantified verification conditions using satisfiability modulo theories
Annals of Mathematics and Artificial Intelligence
Kodkod: a relational model finder
TACAS'07 Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems
Exploiting symmetry in SMT problems
CADE'11 Proceedings of the 23rd international conference on Automated deduction
CAV'11 Proceedings of the 23rd international conference on Computer aided verification
Splitting on demand in SAT modulo theories
LPAR'06 Proceedings of the 13th international conference on Logic for Programming, Artificial Intelligence, and Reasoning
Combining data structures with nonstably infinite theories using many-sorted logic
FroCoS'05 Proceedings of the 5th international conference on Frontiers of Combining Systems
Protocol Proof Checking Simplified with SMT
NCA '12 Proceedings of the 2012 IEEE 11th International Symposium on Network Computing and Applications
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SMT solvers have been used successfully as reasoning engines for automated verification. Current techniques for dealing with quantified formulas in SMT are generally incomplete, forcing SMT solvers to report "unknown" when they fail to prove the unsatisfiability of a formula with quantifiers. This inability to return counter-models limits their usefulness in applications that produce quantified verification conditions. We present a novel finite model finding method that reduces these limitations in the case of quantifiers ranging over free sorts. Our method contrasts with previous approaches for finite model finding in first-order logic by not relying on the introduction of domain constants for the free sorts and by being fully integrated into the general architecture used by most SMT solvers. This integration is achieved through the addition of a novel solver for sort cardinality constraints and a module for quantifier instantiation over finite domains. Initial experiments with verification conditions generated from a deductive verification tool developed at Intel Corp. show that our approach compares quite favorably with the state of the art in SMT.