A high performance VHDL simulator for large systems design

Authors:
Steve Hodgson;Zak Shaar;Andy Smith
Affiliations:
Design Automation Centre, High Performance Systems, ICL, Wenlock Way, Manchester, M12 5DR, U.K.;Design Automation Centre, High Performance Systems, ICL, Wenlock Way, Manchester, M12 5DR, U.K.;Design Automation Centre, High Performance Systems, ICL, Wenlock Way, Manchester, M12 5DR, U.K.
Venue:
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Year:
1995

Citing 2
Cited 1

Design and use of a system-level specification and verification methodology

EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Event manipulation for discrete simulations requiring large numbers of events

Communications of the ACM

Design and use of a system-level specification and verification methodology

EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation

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Abstract