Higher order logic and hardware verification
Higher order logic and hardware verification
HOL Light: A Tutorial Introduction
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
TPHOLs '08 Proceedings of the 21st International Conference on Theorem Proving in Higher Order Logics
Experience report: seL4: formally verifying a high-performance microkernel
Proceedings of the 14th ACM SIGPLAN international conference on Functional programming
A Brief Overview of Agda --- A Functional Language with Dependent Types
TPHOLs '09 Proceedings of the 22nd International Conference on Theorem Proving in Higher Order Logics
TPHOLs '09 Proceedings of the 22nd International Conference on Theorem Proving in Higher Order Logics
From higher-order logic to Haskell: there and back again
Proceedings of the 2010 ACM SIGPLAN workshop on Partial evaluation and program manipulation
HOL2P - a system of classical higher order logic with second order polymorphism
TPHOLs'07 Proceedings of the 20th international conference on Theorem proving in higher order logics
TLDI '12 Proceedings of the 8th ACM SIGPLAN workshop on Types in language design and implementation
Formal verification of monad transformers
Proceedings of the 17th ACM SIGPLAN international conference on Functional programming
Hi-index | 0.00 |
There have been numerous extensions to classical higher-order logic, but not all of them interact non-trivially. Two such extensions, stateless HOL and HOL extended with quantified types, generate an interesting conflict in the way that type operator variables are implemented and handled. This paper details a proposed solution to that conflict and explores the key impacts to the logical kernel. A prototype system, implemented in GHC Haskell, is discussed and compared to related systems.