Accelerating frequent item counting with FPGA

  • Authors:
  • Yuliang Sun;Zilong Wang;Sitao Huang;Lanjun Wang;Yu Wang;Rong Luo;Huazhong Yang

  • Affiliations:
  • E.E. Dept., TNLIST, Tsinghua University, Beijing, China;E.E. Dept., TNLIST, Tsinghua University, Beijing, China;E.E. Dept., TNLIST, Tsinghua University, Beijing, China;IBM Research-China, Beijing, China;E.E. Dept., TNLIST, Tsinghua University, Beijing, China;E.E. Dept., TNLIST, Tsinghua University, Beijing, China;E.E. Dept., TNLIST, Tsinghua University, Beijing, China

  • Venue:
  • Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
  • Year:
  • 2014

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Abstract

Frequent item counting is one of the most important operations in time series data mining algorithms, and the space saving algorithm is a widely used approach to solving this problem. With the rapid rising of data input speeds, the most challenging problem in frequent item counting is to meet the requirement of wire-speed processing. In this paper, we propose a streaming oriented PE-ring framework on FPGA for counting frequent items. Compared with the best existing FPGA implementation, our basic PE-ring framework saves 50% lookup table resources cost and achieves the same throughput in a more scalable way. Furthermore, we adopt SIMD-like cascaded filter for further performance improvements, which outperforms the previous work by up to 3.24 times in some data distributions.