SPAA '92 Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures
Improving locality and parallelism in nested loops
Improving locality and parallelism in nested loops
Automatic Compiler-Inserted Prefetching for Pointer-Based Applications
IEEE Transactions on Computers - Special issue on cache memory and related problems
Predicting whole-program locality through reuse distance analysis
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Compilers: Principles, Techniques, and Tools (2nd Edition)
Compilers: Principles, Techniques, and Tools (2nd Edition)
Proceedings of the 45th annual Design Automation Conference
Characterization of SPEC CPU2006 and SPEC OMP2001: Regression Models and their Transferability
ISPASS '08 Proceedings of the ISPASS 2008 - IEEE International Symposium on Performance Analysis of Systems and software
Hybrid cache architecture with disparate memory technologies
Proceedings of the 36th annual international symposium on Computer architecture
Data Layout Transformation for Enhancing Data Locality on NUCA Chip Multiprocessors
PACT '09 Proceedings of the 2009 18th International Conference on Parallel Architectures and Compilation Techniques
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Energy reduction for STT-RAM using early write termination
Proceedings of the 2009 International Conference on Computer-Aided Design
Resistive computation: avoiding the power wall with low-leakage, STT-MRAM based computing
Proceedings of the 37th annual international symposium on Computer architecture
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
An energy efficient cache design using spin torque transfer (STT) RAM
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Relaxing non-volatility for fast and energy-efficient STT-RAM caches
HPCA '11 Proceedings of the 2011 IEEE 17th International Symposium on High Performance Computer Architecture
Multi retention level STT-RAM cache designs with a dynamic refresh scheme
Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
PS3-RAM: a fast portable and scalable statistical STT-RAM reliability analysis method
Proceedings of the 49th Annual Design Automation Conference
Compiler-assisted preferred caching for embedded systems with STT-RAM based hybrid cache
Proceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Systems
A software approach for combating asymmetries of non-volatile memories
Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design
Static and dynamic co-optimizations for blocks mapping in hybrid caches
Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design
PreSET: improving performance of phase change memories by exploiting asymmetry in write times
Proceedings of the 39th Annual International Symposium on Computer Architecture
Asymmetry of MTJ switching and its implication to STT-RAM designs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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