An efficient FPGA matrix multiplier for linear system simulation

• Authors: Sam Mish;John Zenor;Roy Crosbie
• Venue: Proceedings of the 2013 Grand Challenges on Modeling and Simulation Conference
• Year: 2013

FPGAs are increasingly being used as a key component in cost-effective high-performance simulations. Most of these efforts have been application specific requiring a custom design. Coding an FPGA can be very challenging but simple, non-optimal configurations are possible using graphical tools such as the Simulink blockset. Greater complexity and improved performance can be gained using a Hardware Description Language (HDL) such as VHDL or Verilog. The problem of producing an FPGA-based general-purpose simulation system is considerably more demanding. The design of FPGA solutions that perform complex mathematical operations efficiently is difficult and compile times can be very long. One approach to providing this capability to simulation designers who are not expert FPGA programmers is to use pre-compiled FPGA structures driven by data representing a particular model. A first step is described which provides for the solution of systems of linear differential equations. Non-linear features will be added later. The key to this first step is a flexible, efficient FPGA implementation of a matrix multiplier. An approach is described that improves on previously published methods; that can handle matrices of any size and up to over 100*100 on a single device; that offers flexibility in the choice of FPGA resources, such as DSP (digital signal processor) slices or LUTs (look-up tables); and is linearly scalable in its use of these resources. The method is used as part of an implementation of a multi-rate benchmark representing an unmanned underwater vessel. The matrix multiplier is used in the simulation of the 3-phase induction motor drive of the vessel. Non-linear product terms are also handled in this model. Non-linear features will be added in future in the form of libraries of non-linear elements.