The weakest failure detector to implement a register in asynchronous systems with hybrid communication

  • Authors:
  • Damien Imbs;Michel Raynal

  • Affiliations:
  • IRISA, Université de Rennes 1, France;Institut Universitaire de France, France and IRISA, Université de Rennes 1, France

  • Venue:
  • Theoretical Computer Science
  • Year:
  • 2013

Quantified Score

Hi-index 5.23

Visualization

Abstract

This paper introduces an asynchronous crash-prone hybrid system model. The system is hybrid in the way the processes can communicate. On the one side, a process can send messages to any other process. On another side, the processes are partitioned into clusters and each cluster has its own read/write shared memory. In addition to the model, a main contribution of the paper concerns the implementation of an atomic register in this system model. More precisely, a new failure detector (denoted M@S) is introduced and it is shown that, when considering the information on failures needed to implement a register, this failure detector is the weakest. To that end, the paper presents an M@S-based algorithm that builds a register in the considered hybrid system model and shows that it is possible to extract M@S from any failure detector-based algorithm that implements a register in this model. The paper also (a) shows that M@S is strictly weaker than @S (which is the weakest failure detector to implement a register in a classical message-passing system) and (b) presents a necessary and sufficient condition to implement M@S in a hybrid asynchronous communication system.