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ACM Transactions on Computer Systems (TOCS)
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Communications of the ACM
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IEEE Transactions on Software Engineering - Special issue on distributed systems
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The Stanford Dash Multiprocessor
Computer
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ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
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ACM Transactions on Computer Systems (TOCS)
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ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
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ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Fault Tolerance: Principles and Practice
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IEEE Transactions on Parallel and Distributed Systems
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IEEE Transactions on Parallel and Distributed Systems
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IEEE Transactions on Parallel and Distributed Systems
Notes on Data Base Operating Systems
Operating Systems, An Advanced Course
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ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
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ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
SPLASH: Stanford parallel applications for shared-memory
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IEEE Transactions on Computers
ReVive: cost-effective architectural support for rollback recovery in shared-memory multiprocessors
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
Fault-Tolerant Distributed Shared Memory on a Broadcast-Based Architecture
IEEE Transactions on Parallel and Distributed Systems
Cherry-MP: Correctly Integrating Checkpointed Early Resource Recycling in Chip Multiprocessors
Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture
Rebound: scalable checkpointing for coherent shared memory
Proceedings of the 38th annual international symposium on Computer architecture
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SC '12 Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis
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This paper focuses on the problem of fault tolerance in shared memory multiprocessors, and describes an architecture designed for transparently tolerating processor failures. The Recoverable Shared Memory (RSM) is the novel component of this architecture, providing a hardware supported backward error recovery mechanism which minimizes the propagation of recovery when a processor fails. The RSM permits a shared memory multiprocessor to be constructed using standard caches and cache coherence protocols, and does not require any changes to be made to applications software. The performance of the recovery scheme supported by the RSM is evaluated and compared with other schemes that have been proposed for fault tolerant shared memory multiprocessors. The performance study has been conducted by simulation using address traces collected from real parallel applications.