A Unified Approach to Submicron DC MOS Transistor Modelingfor Low-Voltage ICs

Authors:
Steve H. Jen;Bing J. Sheu;Yoichi Oshima
Affiliations:
Department of Electrical Engineering and Integrated Media Systems Center, University of Southern California, Los Angeles, CA 90089-0271;Department of Electrical Engineering and Integrated Media Systems Center, University of Southern California, Los Angeles, CA 90089-0271;Department of Electrical Engineering and Integrated Media Systems Center, University of Southern California, Los Angeles, CA 90089-0271
Venue:
Analog Integrated Circuits and Signal Processing
Year:
1997

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Abstract

A unified single-equation approach for the MOS transistordrain current modeling for energy-efficient submicron MOS circuitsis presented. Instead of three sets of separate equations forthe triode, saturation, and weak inversion regions, only a continuousexpression which is valid to describe the behavior of drain currentand the derivatives in all operation regions can be realizedby using a combination of hyperbola, sigmoid, and interpolationmethods. The model expression can predict accurate results forthe current, output conductance, and transconductance with continuousand smooth characteristics. The simulation results agree wellwith experimental data.