Interlaced accumulation programming for low power DSP

  • Authors:
  • H. Kojima;A. Shridhar

  • Affiliations:
  • Hitachi America, Ltd. R&D Div., Semiconductor Research Laboratory, 201 E. Tasman Dr., San Jose, CA;Hitachi America, Ltd. R&D Div., Semiconductor Research Laboratory, 201 E. Tasman Dr., San Jose, CA

  • Venue:
  • ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
  • Year:
  • 1996

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Abstract