Data networks
Communicating process architecture: transputers and Occam
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How to write parallel programs: a first course
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Performance analysis and measurement on transputer arrays
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Parallel programs for the transputer
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Computational models for parallel computers
Scientific applications of multiprocessors
Using transputers to simulate optoelectronic computers
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Processor farm analysis and simulation for embedded parallel processing systems
OUG-12 Proceedings of the 12th Occam User Group technical meeting on Tools and techniques for transputer applications
Algorithmic skeletons: structured management of parallel computation
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An adaptive granularity scheduler for multiprocessors
NATUG-6 Proceedings of the sixth conference of the North American Transputer Users Group on Transputer research and applications 6
Implementing recursive functions as processor farms
Parallel Computing
Practical parallel programming
Practical parallel programming
Exploiting parallelism in functional languages: a “paradigm-oriented” approach
Abstract machine models for highly parallel computers
Numerical Recipes: Example Book (C)
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IEEE Software
IEEE Transactions on Parallel and Distributed Systems
Experiments in MIMD Parallelism
PARLE '89 Proceedings of the Parallel Architectures and Languages Europe, Volume II: Parallel Languages
Multi-evidential Correlation \& Visual Echo Analysis
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Performance Metrics for Embedded Parallel Pipelines
IEEE Transactions on Parallel and Distributed Systems
Cross-Platform Performance Prediction of Parallel Applications Using Partial Execution
SC '05 Proceedings of the 2005 ACM/IEEE conference on Supercomputing
A Mathematical Model for Performability of Beowulf Clusters
ANSS '06 Proceedings of the 39th annual Symposium on Simulation
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Proceedings of the international conference on Supercomputing
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In this paper, we describe the design, implementation, and modeling of a runtime kernel to support the processor farm paradigm on multicomputers. We present a general topology-independent framework for obtaining performance models to predict the performance of the start-up, steady-state, and wind-down phases of a processor farm. An algorithm is described, which for any interconnection network determines a tree-structured subnetwork that optimizes farm performance. The analysis technique is applied to the important case of k-ary tree topologies. The models are compared with the measured performance on a variety of topologies using both constant and varied task sizes.