Evaluation of lot release policies for semiconductor manufacturing systems

  • Authors:
  • Raka Sandell;Krishna Srinivasan

  • Affiliations:
  • MOS12 Die Manufacturing, Semiconductor Products Sector, Motorola Inc., 1300, North Alma School Road, Chandler, Arizona;Worldwide Enterprise Modeling Group, Motorola Manufacturing Systems, Motorola Inc., 1299, E. Algonquin Road, Schaumburg, Illinois

  • Venue:
  • WSC '96 Proceedings of the 28th conference on Winter simulation
  • Year:
  • 1996

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Abstract

This paper describes a simulation based approach to evaluate and benchmark various lot release strategies in semiconductor manufacturing systems. A full-factorial experiment, with 5 factors, has been designed and executed for this purpose. A variation of the Bonferroni inequality is used to compute confidence intervals for differences in system performance for different operating strategies. The results show that no lot release policy dominates across all scenarios.