Digital Design of Discrete Exponential BidirectionalAssociative Memory

  • Authors:
  • Chua-Chin Wang;Chih-Lwan Fan

  • Affiliations:
  • Department of Electrical Engineering, National Sun Yat-Sen University, Kaohsiung, Taiwan 80424;Department of Electrical Engineering, National Sun Yat-Sen University, Kaohsiung, Taiwan 80424

  • Venue:
  • Journal of VLSI Signal Processing Systems
  • Year:
  • 1997

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Abstract

The exponential bidirectional associative memory (eBAM) was provedto be a systematically stable high-capacity memory. Considering thedifficulty of the implementation of such an eBAM by analogcircuits and the compactability with binary logic circuits, we adoptthe digital logic methodology to design such a neural network.Besides, we also count in other factors, e.g., scalability and speed,so that the complete digital design of this neural network isfeasible. In order to realize the eBAM by digital circuitry only,some special design is required such that the exponential functioncan be implemented without the loss of operating speed. For example,a high-speed 8-to-9 exponent value generator is required in thedesign. In addition, because the traditional add/sub accumulatorcosts too much area when the dimension of patterns is large, acascaded increment/decrement accumulator (IDA) is proposed in thedesign, which can also speed up the addition or subtraction besidesthe saving of chip area. For the sake of area saving, regenerated IDAis also proposed to reduce the cost of chip area. At last, thoroughsimulations by MAGIC and IRSIM are proceeded to verify theperformance of the design.