YARDS: FPGA/MPU hybrid architecture for telecommunication data processing

Authors:
Akihiro Tsutsui;Toshiaki Miyazaki
Affiliations:
NTT Optical Network Systems Laboratories, 1-1 Hikarinooka, Yokosuka, Kanagawa, 239 Japan;NTT System Electronics Laboratories, 1 Morinosato Wakamiya, Atsugi, Kanagawa, 243-01 Japan
Venue:
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
Year:
1997

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Abstract

This paper presents a novel system architecture applicable to high-performance and flexible transport data processing which includes complex protocol operation and a nehvork control algorithm. We developed a new tightly coupled Held Programmable Gate Array (FPGA) and Micro-Processing Unit (MPU) system named. Yet Another Re-Definable System (YARDS). It comprises three programmable devices which equateto high flexibility. These devices are the RISC-type MPU with memories, programmable inter-connection devices, and FPGAs. Using these, this system supports various styles of coupling between the FPGAs and the MPU which are suitable for constructing transport data processing. In this paper, two applications of the systemin the telecommunications field are given. One is an Operation, Administration, and Management (OAM) cell operations on an AsynchronousTransfer Mode (ATM) network. The other is a dynamic configuration protocol enables the updateor changeof the functions of the transport data processing system on-line. This is the first approach applying the FPGA/MPU hybrid system to the telecommunications field.