Performance analysis of a fault detection scheme in multiprocessor systems

  • Authors:
  • Anton T. Dahbura;Krishan K. Sabnani;William J. Hery

  • Affiliations:
  • AT&T Bell Laboratories, Murray Hill, New Jersey;AT&T Bell Laboratories, Murray Hill, New Jersey;AT&T Bell Laboratories, Whippany, New Jersey

  • Venue:
  • SIGMETRICS '87 Proceedings of the 1987 ACM SIGMETRICS conference on Measurement and modeling of computer systems
  • Year:
  • 1987

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Abstract

A technique is described for detecting and diagnosing faults at the processor level in a multiprocessor system. In this method, a process is assigned whenever possible to two processors: the processor that it would normally be assigned to (primary) and an additional processor which would otherwise be idle (secondary). Two strategies will be described and analyzed: one which is preemptive and another which is non-preemptive. It is shown that for moderately loaded systems, a sufficient percentage of processes can be performed redundantly using the system's spare capacity to provide a basis for fault detection and diagnosis with virtually no degradation of response time.