Low power methodology and design techniques for processor design

Authors:
J. Patrick Brennan;Alvar Dean;Stephan Kenyon;Sebastian Ventrone
Affiliations:
IBM Microelectronics, 1000 River Street 862C, Essex Junction VT;IBM Microelectronics, 1000 River Street 862C, Essex Junction VT;IBM Microelectronics, 1000 River Street 862C, Essex Junction VT;IBM Microelectronics, 1000 River Street 862C, Essex Junction VT
Venue:
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Year:
1998

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Abstract

IBM's ASIC design methodologies is used to develop a low power microprocessor for the mobile (battery powered) marketplace. The design called for a reduction of active power by a factor of 10 times from an estimate of a product designed in a standard 3 volt ASIC design system. An overview of the design methodology and some of the innovative power reduction techniques are presented.