The IBM System/370 Vector Architecture: Design Considerations
IEEE Transactions on Computers
Universal Mechanisms for Data-Parallel Architectures
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
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This paper discusses the performance, complexity and system-integration considerations that shaped the System/370 Vector Architecture [1, 9]. The architecture is intended for compatible systems providing a range of price and performance. The paper reviews the reasons for choosing a register-oriented architecture with compound instructions over storage-to-storage operations and vector-instruction chaining. Then it discusses the role of cache in stride-N storage accessing, and describes some new facilities introduced for control-program purposes.