A Low-Voltage Fully Differential Constant-Gm Rail-to-Rail CMOS Operational Amplifier

Authors:
Giuseppe Ferri;Willy Sansen;Vincenzo Peluso
Affiliations:
Universita’ L’Aquila, Italy, Loc.Monteluco Roio, 67040 Poggio di Roio;Katholieke Universiteit Leuven, Belgium, Kardinaal Mercierlaan 94, 3001 Heverlee;Katholieke Universiteit Leuven, Belgium, Kardinaal Mercierlaan 94, 3001 Heverlee
Venue:
Analog Integrated Circuits and Signal Processing
Year:
1998

Citing 6
Cited 2

The design of fully differential CMOS operational amplifiers without extra common-mode feedback circuits

Analog Integrated Circuits and Signal Processing
Analysis and synthesis of MOS translinear circuits

Analysis and synthesis of MOS translinear circuits
CMOS low-voltage operational amplifiers with constant-gm rail-to-rail input stage

Analog Integrated Circuits and Signal Processing
Rail-to-rail constant-Gm input stage and class AB output stage for low-voltage CMOS op amps

Analog Integrated Circuits and Signal Processing
Design and applications of a CMOS analog multiplier cell using the differential difference amplifier

Analog Integrated Circuits and Signal Processing - Special issue on analog signal processing
Low-voltage low-power opamp based amplifiers

Analog Integrated Circuits and Signal Processing - Special issue: low-voltage low-power analog integrated circuits

Reliable Circuit Techniques for Low-Voltage Analog Design in Deep Submicron Standard CMOS: A Tutorial

Analog Integrated Circuits and Signal Processing
An Adaptive Biased Single-Stage CMOS Operational Amplifier with a Novel Rail-to-Rail Constant-gm Input Stage

Analog Integrated Circuits and Signal Processing

Quantified Score

Hi-index	0.00

Visualization

Abstract

A low-voltage fully differential CMOS operational amplifier withconstant-g_m and rail-to-rail input and output stages ispresented. It is the fully differential version of a previously realizedsingle-ended operational amplifier where a novel circuit to ensure constanttransconductance has been implemented [1]. The input stage is a rail-to-railstructure formed by two symmetrical OTAs in parallel (the input transistorsare operating in weak inversion). The class-AB output stages have also afull voltage swing. A rail-to-rail input common mode feedback structureallows the output voltage control. Measurements in a 0.7 µ standardCMOS process with threshold voltages of about 0.7 V have been done. Theminimum experimental supply voltage is about 1.1 V. The circuit provides a60 dB low frequency voltage gain and about 1.5 MHz unity gain frequency fora total power consumption of about 0.72 mW at a 1.5 V supply voltage.