Knowledge-based optimal IIL generator from conventional logic circuit descriptions

  • Authors:

  • T. Watanabe;T. Masuishi;T. Nishiyama;N. Horie

  • Affiliations:

  • Systems Development Laboratory, Hitachi Ltd., Kawasaki, Japan;Systems Development Laboratory, Hitachi Ltd., Kawasaki, Japan;Hitachi Microcomputer Engineering Ltd., Kodaira, Japan;Takasaki Works, Hitachi, Ltd., Takasaki, Japan

  • Venue:
  • DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
  • Year:
  • 1986

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Abstract

This paper describes a new knowledge-based circuit translator which automatically generates IIL, or Integrated Injection Logic, circuit from conventional logic circuit net data. By accumulating fragmental pieces of knowledge of expert designers into a knowledge base in forms of rules, and using inference mechanism, such tasks are realized as gate connectivity extraction, gate translation and redundant element reduction which have been difficult to implement on conventional procedural programming languages. Furthermore, due to the architecture of the system, system improvement becomes easy through additions and modifications of rules. Approximately 40 to 60% gate reduction was attained compared with simple gate-to-gate translation. Computation time for 100 gates translation is about 200 sec. on Hitachi's main frame M-200H.