Models for use in the design of macro-pipelined parallel processors

  • Authors:
  • Bradley Warren Smith;Howard Jay Siegel

  • Affiliations:
  • PASM Parallel Processing Laboratory, School of Electrical Engineering, Purdue University, West Lafayette, IN;PASM Parallel Processing Laboratory, School of Electrical Engineering, Purdue University, West Lafayette, IN

  • Venue:
  • ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
  • Year:
  • 1985

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Abstract