Complexity and real computation
Complexity and real computation
CNNUC3: A Mixed-Signal 64 x 64 CNN Universal Chip
MICRONEURO '99 Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems
An 0.5-μm CMOS analog random access memory chip for TeraOPSspeed multimedia video processing
IEEE Transactions on Multimedia
IEEE Transactions on Circuits and Systems for Video Technology
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In this paper, first, an overview is given about the wholescenario of analogic CNN computing, as a paradigm of Spatial-temporalInstruction Set Computer (StISC) operating on flows of signal arrays.Next, two areas on CNN Computing Technology are considered briefly:(i) the architectural advances, especially the variable resolutionand adaptation in space, time, and value and (ii) the computationalinfrastructure from high level language and compiler to physicalimplementations. Three basic physical implementations are supposed:analogic CMOS, emulated digital CMOS and optical. The computationalinfrastructure is the same for all implementations, except thephysical interfaces. Finally, the systematic description of theNon-equilibrium Spatial-temporal (NEST) algorithms is given, as a newway of array signal processing, and some practical aspects of NESTalgorithms are discussed.