An Emulated Digital CNN Implementation

  • Authors:
  • Péter Keresztes;ákos Zarándy;Tamás Roska;Péter Szolgay;Tamás Bezák;Timót Hidvégi;Péter Jónás;Attila Katona

  • Affiliations:
  • István Széchenyi Polytechnic H-9026, Hédervári u. 3. Győr, Hungary;Analogic and Neural Computing Systems Laboratory, Computer and Automation Institute, Hungarian Academy of Sciences, P.O.B. 63, H-1502 Budapest, Hungary;Analogic and Neural Computing Systems Laboratory, Computer and Automation Institute, Hungarian Academy of Sciences, P.O.B. 63, H-1502 Budapest, Hungary;Analogic and Neural Computing Systems Laboratory, Computer and Automation Institute, Hungarian Academy of Sciences, P.O.B. 63, H-1502 Budapest, Hungary;Analogic and Neural Computing Systems Laboratory, Computer and Automation Institute, Hungarian Academy of Sciences, P.O.B. 63, H-1502 Budapest, Hungary;Analogic and Neural Computing Systems Laboratory, Computer and Automation Institute, Hungarian Academy of Sciences, P.O.B. 63, H-1502 Budapest, Hungary;Analogic and Neural Computing Systems Laboratory, Computer and Automation Institute, Hungarian Academy of Sciences, P.O.B. 63, H-1502 Budapest, Hungary;University of Veszprém, H-8200, Egyetem u. 10, Veszprém, Hungary

  • Venue:
  • Journal of VLSI Signal Processing Systems - Special issue on spatiotemporal signal processing with analog CNN visual microprocessors
  • Year:
  • 1999

Quantified Score

Hi-index 0.00

Visualization

Abstract

A new emulated digital CNN Universal Machine chiparchitecture is introduced and the main steps of the design processare shown in this paper. One core processor can be implemented on2 × 2 mm^2 silicon area with a 0.35 μm CMOStechnology. Assuming an array of 24 processors on a chip, its speedis 1ns/virtual cell/CNN iteration with 12 bit precision. This enablesthe execution of over five hundred 3 × 3 convolutionoperations on each frame of a 240 × 320-pixel 25 fpsdigital image flow. Another new feature of the designis its variable precision capability. This allows the user to tradeoff precision for speed. The architecture supports some non-linearfilter implementation as well.