Phase-based disparity measurement
CVGIP: Image Understanding
The Design and Use of Steerable Filters
IEEE Transactions on Pattern Analysis and Machine Intelligence
Scanners for visualizing activity of analog VLSI circuitry
Analog Integrated Circuits and Signal Processing
Phase-based binocular vergence control and depth reconstruction using active vision
CVGIP: Image Understanding
An analog VLSI neural network for phase-based machine vision
NIPS '97 Proceedings of the 1997 conference on Advances in neural information processing systems 10
A general purpose image processing chip orientation detection
NIPS '97 Proceedings of the 1997 conference on Advances in neural information processing systems 10
Measurement of Image Velocity
An Analog VLSI Computational Engine for Early Vision Tasks
ICANN '97 Proceedings of the 7th International Conference on Artificial Neural Networks
Biologically Motivated Approach to Face Recognition
IWANN '93 Proceedings of the International Workshop on Artificial Neural Networks: New Trends in Neural Computation
Biologically Motivated Approach to Face Recognition
IWANN '93 Proceedings of the International Workshop on Artificial Neural Networks: New Trends in Neural Computation
CNNUC3: A Mixed-Signal 64 x 64 CNN Universal Chip
MICRONEURO '99 Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems
A 2D Image Filtering Architecture for Real-Time Vision Processing Systems
MICRONEURO '99 Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems
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We describe the analog CMOS VLSI implementation of a cellular neural network (CNN) architecture which spatially filters a 2D image by two orientation selective image filters. The image is represented by a set of input currentssupplied by an on-chip array of photosensors. The filters are similar to even and odd Gabor filters. The CNN architecture is implemented using two resistive networkscoupled by transconductance amplifiers. The tuned orientation can be steered and the filter response scaled by adjusting the conductances of the resistors and gains of the transconductance amplifiers through externally supplied bias voltages. The circuit operation is explained via a variational principle, which defines thefilter output as the minimum of a cost function. We report test results from both 25 × 25 and 45 × 45 pixel arrays.