Design of a low-power CMOS baseband circuit for wideband CDMA testbed (poster session)

  • Authors:

  • Chunlei Shi;Yue Wu;Mohammed Ismail

  • Affiliations:

  • Analog VLSI Lab, The Ohio State University, Columbus, OH;Analog VLSI Lab, The Ohio State University, Columbus, OH;Analog VLSI Lab, The Ohio State University, Columbus, OH

  • Venue:
  • ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
  • Year:
  • 2000

Quantified Score

Hi-index 0.00

Visualization

Abstract

In this paper, the design and performance of a CMOS baseband circuit for WCDMA direct conversion receiver are presented. Consisting of one 5th-order anti-aliasing filter, one 4th-order tunable channel filter, and three variable gain amplifier (VGA) stages, the baseband chain provides 72dB gain range with 2dB gain step and is tunable to select three differentbandwidths (from 5MHz to 20MHz radio-frequency spacing). It dissipates only18mW from a single 3V supply. The input IP3 is 10dBm, and the input-referred noise in the passband is 41nV/$\sqrt{Hz}$.