Hardware support for dynamic activation of compiler-directed computation reuse

  • Authors:

  • Daniel A. Connors;Hillery C. Hunter;Ben-Chung Cheng;Wen-Mei W. Hwu

  • Affiliations:

  • Department of Electrical and Computer Engineering & Computer Science, University of Colorado;Center for Reliable and High-Performance Computing, University of Illinois at Urbana-Champaign;Transmeta Corporation, Santa Clara, CA;Center for Reliable and High-Performance Computing, University of Illinois at Urbana-Champaign

  • Venue:
  • ACM SIGPLAN Notices
  • Year:
  • 2000

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Abstract

Compiler-directed Computation Reuse (CCR) enhances program execution speed and efficiency by eliminating dynamic computation redundancy. In this approach, the compiler designates large program regions for potential reuse. During run time, the execution results of these reusable regions are recorded into hardware buffers for future reuse. Previous work shows that CCR can result in significant performance enhancements in general applications. A major limitation of the work is that the compiler relies on value profiling to identify reusable regions, making it difficult to deploy the scheme in many software production environments. This paper presents a new hardware model that alleviates the need for value profiling at compile time. The compiler is allowed to designate reusable regions that may prove to be inappropriate. The hardware mechanism monitor the dynamic behavior of compiler-designated regions and selectively activates the profitable ones at run time. Experimental results show that the proposed design makes more effective utilization of hardware buffer resources, achieves repid employment of computation regions, and improves reuse accuracy, all of which promote more flexible compiler methods of identifying reusable computation regions.