Analysis and simulation of a fair queueing algorithm
SIGCOMM '89 Symposium proceedings on Communications architectures & protocols
Virtual clock: a new traffic control algorithm for packet switching networks
SIGCOMM '90 Proceedings of the ACM symposium on Communications architectures & protocols
IEEE INFOCOM '92 Proceedings of the eleventh annual joint conference of the IEEE computer and communications societies on One world through communications (Vol. 2)
SIGCOMM '93 Conference proceedings on Communications architectures, protocols and applications
SIGMETRICS '94 Proceedings of the 1994 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Statistical analysis of generalized processor sharing scheduling discipline
SIGCOMM '94 Proceedings of the conference on Communications architectures, protocols and applications
Operating system support for multimedia applications
MULTIMEDIA '94 Proceedings of the second ACM international conference on Multimedia
Analysis of hard real-time communications
Real-Time Systems
Leave-in-Time: a new service discipline for real-time communications in a packet-switching network
SIGCOMM '95 Proceedings of the conference on Applications, technologies, architectures, and protocols for computer communication
A hierarchial CPU scheduler for multimedia operating systems
OSDI '96 Proceedings of the second USENIX symposium on Operating systems design and implementation
Algorithms for Scheduling Real-Time Tasks with Input Error and End-to-End Deadlines
IEEE Transactions on Software Engineering
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
A Reservation-Based Algorithm for Scheduling Both Periodic and Aperiodic Real-Time Tasks
IEEE Transactions on Computers
Guaranteeing Real-Time Requirements With Resource-Based Calibration of Periodic Processes
IEEE Transactions on Software Engineering
Probabilistic performance guarantee for real-time tasks with varying computation times
RTAS '95 Proceedings of the Real-Time Technology and Applications Symposium
RTAS '97 Proceedings of the 3rd IEEE Real-Time Technology and Applications Symposium (RTAS '97)
Visual assessment of a real-time system design: a case study on a CNC controller
RTSS '96 Proceedings of the 17th IEEE Real-Time Systems Symposium
On task schedulability in real-time control systems
RTSS '96 Proceedings of the 17th IEEE Real-Time Systems Symposium
A proportional share resource allocation algorithm for real-time, time-shared systems
RTSS '96 Proceedings of the 17th IEEE Real-Time Systems Symposium
Resource Conscious Design of Distributed Real-Time Systems: An End-to-End Approach
ICECCS '96 Proceedings of the 2nd IEEE International Conference on Engineering of Complex Computer Systems
IJSIS '96 Proceedings of the 1996 IEEE International Joint Symposia on Intelligence and Systems
Stride Scheduling: Deterministic Proportional- Share Resource Management
Stride Scheduling: Deterministic Proportional- Share Resource Management
Providing end-to-end performance guarantees using non-work-conserving disciplines
Computer Communications
Power-Aware Design Synthesis Techniques for Distributed Real-Time Systems
OM '01 Proceedings of the 2001 ACM SIGPLAN workshop on Optimization of middleware and distributed systems
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This paper presents a design synthesis method for distributed embedded systems. In such systems, computations can flow through long pipelines of interacting software components, hosted on a variety of resources, each of which is managed by a local scheduler. Our method automatically calibrates the local resource schedulers to achieve the system's global end-to-end performance requirements. A system is modeled as a set of distributed task chains (or pipelines), where each task represents an activity requiring nonzero load from some CPU or network resource. Task load requirements can vary stochastically due to second-order effects like cache memory behavior, DMA interference, pipeline stalls, bus arbitration delays, transient head-of-line blocking, etc. We aggregate these effects驴along with a task's per-service load demand驴and model them via a single random variable, ranging over an arbitrary discrete probability distribution. Load models can be obtained via profiling tasks in isolation or simply by using an engineer's hypothesis about the system's projected behavior. The end-to-end performance requirements are posited in terms of throughput and delay constraints. Specifically, a pipeline's delay constraint is an upper bound on the total latency a computatation can accumulate, from input to output. The corresponding throughput constraint mandates the pipeline's minimum acceptable output rate驴counting only outputs which meet their delay constraints. Since per-component loads can be generally distributed, and since resources host stages from multiple pipelines, meeting all of the system's end-to-end constraints is a nontrivial problem. Our approach involves solving two subproblems in tandem: 1) finding an optimal proportion of load to allocate to each task and channel and 2) deriving the best combination of service intervals over which all load proportions can be guaranteed. The design algorithms use analytic approximations to quickly estimate output rates and propagation delays for candidate solutions. When all parameters are synthesized, the estimated end-to-end performance metrics are rechecked by simulation. The per-component load reservations can then be increased, with the synthesis algorithms rerun to improve performance. At that point, the system can be configured according to the synthesized scheduling parameters驴and then revalidated via on-line profiling. In this paper, we demonstrate our technique on an example system, and compare the estimated performance to its simulated on-line behavior.