Static Single Assignment Form for Message-Passing Programs

  • Authors:

  • Dhruva R. Chakrabarti;Prithviraj Banerjee

  • Affiliations:

  • Current address: Hewlett-Packard Company, California. dhruva@cup.hp.com;Center for Parallel and Distributed Computing, ECE Dept., Technological Institute, Northwestern University, 2145 Sheridan Road, Evanston, Illinois 60208-3118. banerjee@ece.nwu.edu

  • Venue:
  • International Journal of Parallel Programming
  • Year:
  • 2001

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Abstract

This paper presents a novel scheme for maintaining accurate information about distributed data in message-passing programs. We describe static single assignment (SSA) based algorithms to build up an intermediate representation of a sequential program while targeting code generation for distributed memory machines employing the single program multiple data (SPMD) model of programming. This SSA-based intermediate representation helps in a variety of optimizations performed by our automatic parallelizing compiler, PARADIGM, which generates message passing programs and targets distributed memory machines. In this paper, we concentrate on the semantics and implementation of this SSA-form for message-passing programs while giving some examples of the kind of optimizations they enable. We describe in detail the need for various kinds of merge functions to maintain the single assignment property of distributed data. We give algorithms for placement and semantics of these merge functions and show how the requirements are substantially different owing to the presence of distributed data and arbitrary array addressing functions. This scheme has been incorporated in our compiler framework which can use uniform methods to compile, parallelize, and optimize a sequential program irrespective of the subscripts used in array addressing functions. Experimental results for a number of benchmarks on an IBM SP-2 show a significant improvement in the total runtimes owing to some of the optimizations enabled by the SSA-based intermediate representation. We have observed up to around 10–25% reduction in total runtimes in our SSA-based schemes compared to non-SSA-based schemes on 16 processors.