Least-square estimation of average power in digital CMOS circuits

  • Authors:
  • Ashok K. Murugavel;N. Ranganathan;R. Chandramouli;Srinath Chavali

  • Affiliations:
  • Univ. of South Florida, Tampa;Univ. of South Florida, Tampa;Stevens Institute of Technology, Hoboken, NJ;LSI Logic, Santa Clara, CA

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 2002

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Abstract

The estimation of average-power dissipation of a circuit through exhaustive simulation is impractical due to the large number of primary inputs and their combinations. In this brief, two algorithms based on least square estimation are proposed for determining the average power dissipation in complementary metal-oxide-semiconductor (CMOS) circuits. Least square estimation converges faster by attempting to minimize the mean square error value during each iteration. Two statistical approaches namely, the sequential least square (SLS) estimation and the recursive least square estimation are investigated. The proposed methods are distribution independent in terms of the input samples, unbiased and point estimation based. Experimental results presented for the MCNC'91 and the ISCAS'89 benchmark circuits show that the least square estimation algorithms converge faster than other statistical techniques such as the Monte Carlo method (4) and the DIPE (8).