Neural networks for pattern recognition
Neural networks for pattern recognition
An HW/SWCo-Design Approach for Neuro-Fuzzy Hardware Design
MICRONEURO '99 Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems
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This paper presents the architecture of Maharadja, a low-power consumption embedded system to perform the real time simulation of RBF networks with three possible distances: the Manhattan, the Euclidian or the Mahalanobis distance. This system achieves the same performances for the Manhattan distance, than existing RBF dedicated hardware, like Zisc or Ni1000. But it overtakes these systems because it can simulate Euclidian and Mahalanobis distances in real time. Moreover, Maharadja is designed for its integration into a ‘System On a Chip’.