Timing variation in dual loop benchmark

  • Authors:
  • N. Altman;N. Weiderman

  • Affiliations:
  • Ada Embedded Systems Testbed Project, Software Engineering Institute, Carnegie Mellon University, Pittsburgh, PA;Ada Embedded Systems Testbed Project, Software Engineering Institute, Carnegie Mellon University, Pittsburgh, PA

  • Venue:
  • ACM SIGAda Ada Letters
  • Year:
  • 1988

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Abstract

Benchmarks that measure time values using a standard system clock often employ a dual loop design. One of the important assumptions of this design is that textually identical loop statements will take the same amount of time to execute. This assumption has been tested on two bare computers with Ada® test programs and has been demonstrated to be inaccurate in these specific test cases.