Rapid prototyping methodology for multi-DSP TI C6X platforms applied to an Mpeg-2 coding application

  • Authors:
  • J. F. Nezan;O. Deforges;M. Raulet

  • Affiliations:
  • UMR CNRS 6164 IETR/Insa Rennes, France;UMR CNRS 6164 IETR/Insa Rennes, France;UMR CNRS 6164 IETR/Insa Rennes, France

  • Venue:
  • Proceedings of the fourteenth annual ACM symposium on Parallel algorithms and architectures
  • Year:
  • 2002

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Abstract

Real time signal and image applications have very important time constraints, involving the use of several powerful numerical calculation units. Our aim is to develop a fast prototyping process dedicated to parallel architectures made of several last generation Texas Instruments TMS320C6X DSP. The methodology is based on the use of SynDEx, a CAD software improving the algorithm implementation onto multiprocessor architectures, finding the best matching between an algorithm and an architecture. A SynDEx executive kernel has been developed for the C6X DSP family in order to automatically generate a distributed and optimized static executive of the specified algorithm onto those processors. We have tested the efficiency of our methodology with a complete Mpeg-2 coding application.