Simultaneous multithreading: maximizing on-chip parallelism
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
A Survey of Reconfigurable Computing Architectures
FPL '98 Proceedings of the 8th International Workshop on Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm
Reconfigurable Processing: The Solution to Low-Power Programmable DSP
ICASSP '97 Proceedings of the 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP '97) -Volume 1 - Volume 1
Image and video coding-emerging standards and beyond
IEEE Transactions on Circuits and Systems for Video Technology
VLSI implementations of image and video multimedia processing systems
IEEE Transactions on Circuits and Systems for Video Technology
Associative controlling of monolithic parallel processor architectures
IEEE Transactions on Circuits and Systems for Video Technology
Configurable data memory for multimedia processing
Journal of Signal Processing Systems - Special Issue: Embedded computing systems for DSP
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Architectural concepts are presented aimed at future multimedia processing schemes. Starting from an analysis of current and future multimedia applications, specific computational requirements are derived. It will be shown that multimedia applications benefit from an exhaustive and flexible exploitation of parallelism. Three architectural concepts—reconfigurable computing, simultaneous multithreading, and associative controlling—are presented, and their potential to increase further the performance on future multimedia applications is investigated.