System-level design of IEEE1394 bus segment bridge

Authors:
Hirofumi Yamamoto;Keishi Chikamura;Atsuhito Shigiya;Kosuke Tsujino;Tomonori Izumi;Takao Onoye;Yukihiro Nakamura
Affiliations:
Kyoto University, Kyoto, Japan;Kyoto University, Kyoto, Japan;Kyoto University, Kyoto, Japan;Kyoto University, Kyoto, Japan;Kyoto University, Kyoto, Japan;Kyoto University, Kyoto, Japan;Kyoto University, Kyoto, Japan
Venue:
Proceedings of the 15th international symposium on System Synthesis
Year:
2002

Citing 3
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Abstract

A system simulation environment is constructed dedicatedly for IEEE1394 high-speed digital communication. In this environment, various network transactions inherent in communication systems are taken into account for system simulation, which is indispensable to enable IP (Intellectual Property)-based design of the systems. By using the proposed environment, system-level design of IEEE1394 link layer controller and bus segment bridge is achieved with great ability of network transactions as well as connectivities with physical layer chips. Functionalities of the designed bus segment bridge has been verified according to its FPGA implementation.