Multidisciplinary Collaboration Methodology for Smart Perception System-on-a-Chip (SoC)

Authors:
R. L. Ewing;H. S. Abdel-Aty-Zohdy;G. B. Lamont
Affiliations:
US Air Force Research Laboratory, Information Directorate, Adj Prof., Air Force Institute of Technology, Wright-Patterson Air Force Base, Dayton, Ohio 45433;Microelectronics System Design Laboratory, Department of Electrical and Systems Engineering, Oakland University, Rochester, Michigan 48309;Department of Electrical and Computer Engineering, Graduate School of Engineering, Air Force Institute of Technology, Wright-Patterson AFB, Dayton, Ohio 45433
Venue:
Analog Integrated Circuits and Signal Processing
Year:
2001

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Abstract

Smart Perception System-on-a-Chip (iSoC) isystems that sense, receive, transmit, and process signals are the ieyes and ears in the millennium's need of information fusion and embedded intelligence. For intelligent fusion, the process of storing and analyzing the signals acquired from these ismart perception systems involves the interoperability of mixed-signal systems. Embedded intelligence involves the collaborative blending of mixed-signal systems with the multidisciplinary areas of mixed-technology domains (electrical, mechanical, optical, thermal, biochemical) and mixed-concept performance (electrical, control, digital signal processing). Collaboration of mixed-signal design differences, impose robust design challenges for multidisciplinary design methodology. Integrating application-specific signal processor cores, memory, analog and iMEMs functions on the same monolithic chip of silicon involves unique collaborative design methodology in both the macro and micro arenas. Macro collaborative automation tools reflecting rapid prototyping techniques, enabling teams of designers to work together from remote sites is today's realization. Micro collaborative approaches in iSoC submicron manufacturing capability, requires advances in interoperability simulation technology, hardware description languages, design analysis tools, model availability and accuracy, physical design tools, design synthesis tools, pre-developed and tested libraries of intellectual property, design advisors and test generators is tomorrow's future. At present, no micro collaborative design environment is capable of this methodology. Establishment of cross-tool interoperability design interchange standards that can bridge the gap between future and present collaborative design methodology and reduce the cost of iSoC design and design time is required.