Floating-Point to Logarithmic Encoder Error Analysis

  • Authors:

  • Thanos Stouraitis;Fred J. Taylor

  • Affiliations:

  • Ohio State Univ. of Univ., Columbus;Univ. of Florida, Gainesville

  • Venue:
  • IEEE Transactions on Computers
  • Year:
  • 1988

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Abstract

The logarithmic number (LNS), which supports high-speed, high-precision arithmetic, is envisioned as a possible arithmetic coprocessor attachment to a floating-point (FLP) processor. An error analysis of an FLP-to-LNS encoder is presented. Analytic expressions for the probability density function of the encoding error are derived for a number of cases, according to the memory word lengths used for the encoding. Simulation has verified the theoretical results.