Block-cyclic redistribution over heterogeneous networks

  • Authors:

  • Prashanth B. Bhat;Viktor K. Prasanna;C. S. Raghavendra

  • Affiliations:

  • Department of EE-Systems, University of Southern California, Los Angeles, CA 90089-2562, USA;Department of EE-Systems, University of Southern California, Los Angeles, CA 90089-2562, USA;The Aerospace Corporation, Los Angeles, CA 90009, USA

  • Venue:
  • Cluster Computing
  • Year:
  • 2000

Quantified Score

Hi-index 0.00

Visualization

Abstract

Clusters of workstations and networked parallel computing systems are emerging as promising computational platforms for HPC applications. The processors in such systems are typically interconnected by a collection of heterogeneous networks such as Ethernet, ATM, and FDDI, among others. In this paper, we develop techniques to perform block-cyclic redistribution over P processors interconnected by such a collection of heterogeneous networks. We represent the communication scheduling problem using a timing diagram formalism. Here, each interprocessor communication event is represented by a rectangle whose height denotes the time to perform this event over the heterogeneous network. The communication scheduling problem is then one of appropriately positioning the rectangles so as to minimize the completion time of all the communication events. For the important case where the block size changes by a factor of K, we develop a heuristic algorithm whose completion time is at most twice the optimal. The running time of the heuristic is \mathrm{O}(PK^2). Our heuristic algorithm is adaptive to variations in network performance, and derives schedules at run-time, based on current information about the available network bandwidth. Our experimental results show that our schedules always have communication times that are very close to optimal.