A Constraint Satisfaction Approach to a Circuit Design Problem

  • Authors:

  • Jean-François Puget;Pascal Van Hentenryck

  • Affiliations:

  • Ilog SA, 9 rue de Verdun, F-94253 Gentilly, France E-mail: puget@ilog.fr;Brown University, Box 1910, Providence, RI 02912, USA E-mail: pvh@cs.brown.edu

  • Venue:
  • Journal of Global Optimization
  • Year:
  • 1998

Quantified Score

Hi-index 0.00

Visualization

Abstract

A classical circuit-design problem from Ebers and Moll (1954) features asystem of nine nonlinear equations in nine variables that is verychallenging both for local and global methods. This system was solvedglobally using an interval method by Ratschek and Rokne (1993) in the box[0, 10]^9. Their algorithm had enormous costs (i.e., over 14months using a network of 30 Sun Sparc-1 workstations) but they state that’’at this time, we know no other method which has been applied to thiscircuit design problem and which has led to the same guaranteed result oflocating exactly one solution in this huge domain, completed with a reliableerror estimate‘‘. The present paper gives a novel branch-and-prune algorithmthat obtains a unique safe box for the above system within reasonablecomputation times. The algorithm combines traditional interval techniqueswith an adaptation of discrete constraint-satisfaction techniques tocontinuous problems. Of particular interest is the simplicity of theapproach.