Multiple Antenna Enhancements for a High Rate CDMA Packet Data System

  • Authors:
  • Howard Huang;Harish Viswanathan;Andrew Blanksby;Mohamed A. Haleem

  • Affiliations:
  • Lucent Technologies, 791 Holmdel-Keyport Rd., Holmdel, NJ 07733, USA;Lucent Technologies, 791 Holmdel-Keyport Rd., Holmdel, NJ 07733, USA;Lucent Technologies, 791 Holmdel-Keyport Rd., Holmdel, NJ 07733, USA;Lucent Technologies, 791 Holmdel-Keyport Rd., Holmdel, NJ 07733, USA

  • Venue:
  • Journal of VLSI Signal Processing Systems
  • Year:
  • 2002

Quantified Score

Hi-index 0.00

Visualization

Abstract

A High Data Rate (HDR) system has been proposed for providing downlink wireless packet service by using a channel-aware scheduling algorithm to transmit to users in a time-division multiplexed manner. In this paper, we propose using multiple antennas at the transmitter and/or at the receiver to improve performance of an HDR system. We consider the design tradeoffs between scheduling and multi-antenna transmission/detection strategies and investigate the average Shannon capacity throughput as a function of the number of antennas assuming ideal channel estimates and rate feedback. The highest capacities are achieved using multiple antennas at both the transmitter and receiver. For such systems, the best performance is achieved using a multi-input multi-output capacity-achieving transmission scheme such as BLAST (Bell Labs Layered Space-Time) in which the transmitted signal is coded in space and time, and the receive antennas are used to resolve the spatial interference. In the second part of the paper, we discuss practical transmitter and receiver architectures using BLAST for approaching the theoretical gains promised by the capacity analysis. Because the terminal receivers will be portable devices with limited computational and battery power, we perform a computational complexity analysis of the receiver and make high-level assessments on its feasibility. We conclude that the overall computational requirements are within the reach of current hardware technology.