Polyphase Filter Approach for High Performance, FPGA-Based Quadrature Demodulation

  • Authors:

  • J. M. P. Langlois;D. Al-Khalili;R. J. Inkol

  • Affiliations:

  • Department of Electrical and Computer Engineering, Royal Military College of Canada, Kingston, Ontario, Canada K7K 7B4;Department of Electrical and Computer Engineering, Royal Military College of Canada, Kingston, Ontario, Canada K7K 7B4;Electronic Warfare Section, Defense Research Establishment Ottawa, National Defence, Ottawa, Ontario, Canada K1A 0Z4

  • Venue:
  • Journal of VLSI Signal Processing Systems
  • Year:
  • 2002

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Abstract

The polyphase filter approach to quadrature demodulation is shown to be well suited for the implementation of purpose-designed wide bandwidth digital quadrature demodulators. The duplicated polyphase filter approach is introduced, as a way to increase the maximum allowable input signal bandwidth for a given implementation technology. Other algorithmic and architectural considerations specifically applicable to the realization of digital filters in low-cost Field-Programmable Gate Array (FPGA) technology are discussed. A design example suitable for processing input signals centered on an intermediate frequency of 160 MHz with a bandwidth of ∼45 MHz is presented. This design occupies 83% of the Configurable Logic Blocks (CLBs) in a low-cost Xilinx X4010E-3 FPGA. Additional techniques for further performance optimization are presented.