A Configurable Architecture for the Wavelet Packet Transform

Authors:
María A. Trenas;Juan López;Emilio L. Zapata;Francisco Argüello
Affiliations:
Dpto. Arquitectura Computadores, Complejo Tecnológico, Campus de Teatinos, Universidad de Málaga, Apdo. 4114, E-29080 Málaga, Spain;Dpto. Arquitectura Computadores, Complejo Tecnológico, Campus de Teatinos, Universidad de Málaga, Apdo. 4114, E-29080 Málaga, Spain;Dpto. Arquitectura Computadores, Complejo Tecnológico, Campus de Teatinos, Universidad de Málaga, Apdo. 4114, E-29080 Málaga, Spain;Dpto. Electrónica y Computación, Universidad de Santiago de Compostela, Spain
Venue:
Journal of VLSI Signal Processing Systems
Year:
2002

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Abstract

The standard Wavelet Transform (WT) has a wide range of applications, from signal analysis to image or video compression and communications. Most of these applications would be benefited if the transform provided good spectral and temporal resolution in arbitrary regions of the time-frequency plane. This flexible choice of the time-frequency tiling is provided by the Wavelet Packet Transform (WPT). Though many VLSI architectures have been proposed for the WT in the literature, it is not the case for the WPT. We present both word-serial and word-parallel real-time pipelined architectures capable of computing a complete WPT binary tree, but which are easily configurable to compute any required WPT subtree.