Interference Reduction in Packet-Switched Time Division Duplexing Systems

Authors:
S. H. Lau;W. C. Wong
Affiliations:
Department of Electrical Engineering, National University of Singapore, 10 Kent Ridge Crescent, Singapore 119260, Singapore E-mail: ccewwcl@nus.edu.sg;Department of Electrical Engineering, National University of Singapore, 10 Kent Ridge Crescent, Singapore 119260, Singapore E-mail: ccewwcl@nus.edu.sg
Venue:
Wireless Personal Communications: An International Journal
Year:
2001

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Abstract

In this paper, we propose two approaches to reduce interference in packet-switched TDD systems. The first involves the arranging of a judicious power margin between the BS and MS transmitters with and without power control. The second explores various slot assignment algorithms with and without slot reassignment. Significant improvements in performance can be obtained using such approaches, leading to gains in effective throughput.