A fast mutual exclusion algorithm
ACM Transactions on Computer Systems (TOCS)
A first-come-first-served mutual-exclusion algorithm with small communication variables
ACM Transactions on Programming Languages and Systems (TOPLAS)
Fast, scalable synchronization with minimal hardware support
PODC '93 Proceedings of the twelfth annual ACM symposium on Principles of distributed computing
Spin-Lock Synchronization on the Butterfly and KSR1
IEEE Parallel & Distributed Technology: Systems & Technology
Journal of Parallel and Distributed Computing - Special issue on scalability of parallel algorithms and architectures
IEEE Transactions on Parallel and Distributed Systems
A space- and time-efficient local-spin spin lock
Information Processing Letters
Shared-memory mutual exclusion: major research trends since 1986
Distributed Computing - Papers in celebration of the 20th anniversary of PODC
A study of shared-memory mutual exclusion protocols using CADP
FMICS'10 Proceedings of the 15th international conference on Formal methods for industrial critical systems
Science of Computer Programming
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Performance evaluations and comparisons of mutual exclusion algorithms have been mainly focused on algorithm analyses in terms of their computational complexities. However, effects from architectures and implementation variations also play important roles in performance of the algorithms. In this article, we propose a framework for mutual exclusion algorithm performance evaluation on shared-memory multiprocessors, which combines three important factors, namely, the properties of the algorithms, execution complexities, and architecture and system effects. We implemented several representative mutual exclusion algorithms on two different shared-memory multiprocessor systems: the BBN TC2000 and the KSR-1. Using measured network latencies of algorithm executions, we evaluate and compare the scalabilities of the algorithms. Finally, we propose new and efficient mutual exclusion algorithms that combine good features of existing mutual exclusion algorithms. Our results show that execution performance of software-based algorithms are highly architecture-dependent. In general, a hardware-based algorithm performs more efficiently than a software-based algorithm in the presence of contention, due to support from atomic instructions. However, software-based algorithms have a unique advantage of flexibility, which can be used to take advantage of the structure of architectures and systems. Execution performance of these new software-based algorithms shows their potential to rival against hardware-based algorithms for mutual exclusion on shared-memory architectures.