A graph-theoretic approach for timing analysis and its implementation
IEEE Transactions on Computers - Special Issue on Real-Time Systems
STATEMATE: A Working Environment for the Development of Complex Reactive Systems
IEEE Transactions on Software Engineering
System Specification with the SpecCharts Language
IEEE Design & Test
Algorithms for Interface Timing Verification
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
A Graph-Based Method for Timing Diagrams Representation and Verification
CHARME '93 Proceedings of the IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
A New Interface Specification Methodology and
A New Interface Specification Methodology and
IEEE Annals of the History of Computing - Special issue on Central and Eastern Europe
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An algorithm for formal verification of the timing rule set that expresses timing discipline in digital system specifications is described. The algorithm is based on a higher level behavioral specification model and concerns formal consistency verification at the design level of system specification development procedure.